MG32F10x Standard Peripherals Firmware Library

mg32f10x_tim.h
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10 /* Define to prevent recursive inclusion -------------------------------------*/
11 #ifndef __MG32F10x_TIM_H
12 #define __MG32F10x_TIM_H
13
14 #ifdef __cplusplus
15 extern "C" {
16 #endif
17
18 /* Includes ------------------------------------------------------------------*/
19 #include "mg32f10x.h"
20
29 /* Exported types ------------------------------------------------------------*/
30
35 typedef struct
36 {
37 uint16_t TIM_Prescaler;
40 uint16_t TIM_CounterMode;
43 uint32_t TIM_Period;
47 uint16_t TIM_ClockDivision;
50 uint8_t TIM_RepetitionCounter;
58 } TIM_TimeBaseInitTypeDef;
59
64 typedef struct
65 {
66 uint16_t TIM_OCMode;
69 uint16_t TIM_OutputState;
72 uint16_t TIM_OutputNState;
76 uint32_t TIM_Pulse;
79 uint16_t TIM_OCPolarity;
82 uint16_t TIM_OCNPolarity;
86 uint16_t TIM_OCIdleState;
90 uint16_t TIM_OCNIdleState;
93 } TIM_OCInitTypeDef;
94
99 typedef struct
100 {
101
102 uint16_t TIM_Channel;
105 uint16_t TIM_ICPolarity;
108 uint16_t TIM_ICSelection;
111 uint16_t TIM_ICPrescaler;
114 uint16_t TIM_ICFilter;
116 } TIM_ICInitTypeDef;
117
123 typedef struct
124 {
125
126 uint16_t TIM_OSSRState;
129 uint16_t TIM_OSSIState;
132 uint16_t TIM_LOCKLevel;
135 uint16_t TIM_DeadTime;
139 uint16_t TIM_Break;
142 uint16_t TIM_BreakPolarity;
145 uint16_t TIM_AutomaticOutput;
147 } TIM_BDTRInitTypeDef;
148
149 /* Exported constants --------------------------------------------------------*/
150
155 #define IS_TIM_ALL_PERIPH(PERIPH) (((PERIPH) == TIM1) || \
156 ((PERIPH) == TIM2) || \
157 ((PERIPH) == TIM3) || \
158 ((PERIPH) == TIM4))
159
160 /* LIST1: TIM 1 */
161 #define IS_TIM_LIST1_PERIPH(PERIPH) ((PERIPH) == TIM1)
162
163
168 #define TIM_OCMode_Timing ((uint16_t)0x0000)
169 #define TIM_OCMode_Active ((uint16_t)0x0010)
170 #define TIM_OCMode_Inactive ((uint16_t)0x0020)
171 #define TIM_OCMode_Toggle ((uint16_t)0x0030)
172 #define TIM_OCMode_PWM1 ((uint16_t)0x0060)
173 #define TIM_OCMode_PWM2 ((uint16_t)0x0070)
174 #define IS_TIM_OC_MODE(MODE) (((MODE) == TIM_OCMode_Timing) || \
175 ((MODE) == TIM_OCMode_Active) || \
176 ((MODE) == TIM_OCMode_Inactive) || \
177 ((MODE) == TIM_OCMode_Toggle)|| \
178 ((MODE) == TIM_OCMode_PWM1) || \
179 ((MODE) == TIM_OCMode_PWM2))
180 #define IS_TIM_OCM(MODE) (((MODE) == TIM_OCMode_Timing) || \
181 ((MODE) == TIM_OCMode_Active) || \
182 ((MODE) == TIM_OCMode_Inactive) || \
183 ((MODE) == TIM_OCMode_Toggle)|| \
184 ((MODE) == TIM_OCMode_PWM1) || \
185 ((MODE) == TIM_OCMode_PWM2) || \
186 ((MODE) == TIM_ForcedAction_Active) || \
187 ((MODE) == TIM_ForcedAction_InActive))
188
196 #define TIM_OPMode_Single ((uint16_t)0x0008)
197 #define TIM_OPMode_Repetitive ((uint16_t)0x0000)
198 #define IS_TIM_OPM_MODE(MODE) (((MODE) == TIM_OPMode_Single) || \
199 ((MODE) == TIM_OPMode_Repetitive))
200
208 #define TIM_Channel_1 ((uint16_t)0x0000)
209 #define TIM_Channel_2 ((uint16_t)0x0004)
210 #define TIM_Channel_3 ((uint16_t)0x0008)
211 #define TIM_Channel_4 ((uint16_t)0x000C)
212 #define IS_TIM_CHANNEL(CHANNEL) (((CHANNEL) == TIM_Channel_1) || \
213 ((CHANNEL) == TIM_Channel_2) || \
214 ((CHANNEL) == TIM_Channel_3) || \
215 ((CHANNEL) == TIM_Channel_4))
216 #define IS_TIM_PWMI_CHANNEL(CHANNEL) (((CHANNEL) == TIM_Channel_1) || \
217 ((CHANNEL) == TIM_Channel_2))
218 #define IS_TIM_COMPLEMENTARY_CHANNEL(CHANNEL) (((CHANNEL) == TIM_Channel_1) || \
219 ((CHANNEL) == TIM_Channel_2) || \
220 ((CHANNEL) == TIM_Channel_3))
221
229 #define TIM_CKD_DIV1 ((uint16_t)0x0000)
230 #define TIM_CKD_DIV2 ((uint16_t)0x0100)
231 #define TIM_CKD_DIV4 ((uint16_t)0x0200)
232 #define IS_TIM_CKD_DIV(DIV) (((DIV) == TIM_CKD_DIV1) || \
233 ((DIV) == TIM_CKD_DIV2) || \
234 ((DIV) == TIM_CKD_DIV4))
235
243 #define TIM_CounterMode_Up ((uint16_t)0x0000)
244 #define TIM_CounterMode_Down ((uint16_t)0x0010)
245 #define TIM_CounterMode_CenterAligned1 ((uint16_t)0x0020)
246 #define TIM_CounterMode_CenterAligned2 ((uint16_t)0x0040)
247 #define TIM_CounterMode_CenterAligned3 ((uint16_t)0x0060)
248 #define IS_TIM_COUNTER_MODE(MODE) (((MODE) == TIM_CounterMode_Up) || \
249 ((MODE) == TIM_CounterMode_Down) || \
250 ((MODE) == TIM_CounterMode_CenterAligned1) || \
251 ((MODE) == TIM_CounterMode_CenterAligned2) || \
252 ((MODE) == TIM_CounterMode_CenterAligned3))
253
261 #define TIM_OCPolarity_High ((uint16_t)0x0000)
262 #define TIM_OCPolarity_Low ((uint16_t)0x0002)
263 #define IS_TIM_OC_POLARITY(POLARITY) (((POLARITY) == TIM_OCPolarity_High) || \
264 ((POLARITY) == TIM_OCPolarity_Low))
265
273 #define TIM_OCNPolarity_High ((uint16_t)0x0000)
274 #define TIM_OCNPolarity_Low ((uint16_t)0x0008)
275 #define IS_TIM_OCN_POLARITY(POLARITY) (((POLARITY) == TIM_OCNPolarity_High) || \
276 ((POLARITY) == TIM_OCNPolarity_Low))
277
285 #define TIM_OutputState_Disable ((uint16_t)0x0000)
286 #define TIM_OutputState_Enable ((uint16_t)0x0001)
287 #define IS_TIM_OUTPUT_STATE(STATE) (((STATE) == TIM_OutputState_Disable) || \
288 ((STATE) == TIM_OutputState_Enable))
289
297 #define TIM_OutputNState_Disable ((uint16_t)0x0000)
298 #define TIM_OutputNState_Enable ((uint16_t)0x0004)
299 #define IS_TIM_OUTPUTN_STATE(STATE) (((STATE) == TIM_OutputNState_Disable) || \
300 ((STATE) == TIM_OutputNState_Enable))
301
309 #define TIM_CCx_Enable ((uint16_t)0x0001)
310 #define TIM_CCx_Disable ((uint16_t)0x0000)
311 #define IS_TIM_CCX(CCX) (((CCX) == TIM_CCx_Enable) || \
312 ((CCX) == TIM_CCx_Disable))
313
321 #define TIM_CCxN_Enable ((uint16_t)0x0004)
322 #define TIM_CCxN_Disable ((uint16_t)0x0000)
323 #define IS_TIM_CCXN(CCXN) (((CCXN) == TIM_CCxN_Enable) || \
324 ((CCXN) == TIM_CCxN_Disable))
325
333 #define TIM_Break_Enable ((uint16_t)0x1000)
334 #define TIM_Break_Disable ((uint16_t)0x0000)
335 #define IS_TIM_BREAK_STATE(STATE) (((STATE) == TIM_Break_Enable) || \
336 ((STATE) == TIM_Break_Disable))
337
345 #define TIM_BreakPolarity_Low ((uint16_t)0x0000)
346 #define TIM_BreakPolarity_High ((uint16_t)0x2000)
347 #define IS_TIM_BREAK_POLARITY(POLARITY) (((POLARITY) == TIM_BreakPolarity_Low) || \
348 ((POLARITY) == TIM_BreakPolarity_High))
349
357 #define TIM_AutomaticOutput_Enable ((uint16_t)0x4000)
358 #define TIM_AutomaticOutput_Disable ((uint16_t)0x0000)
359 #define IS_TIM_AUTOMATIC_OUTPUT_STATE(STATE) (((STATE) == TIM_AutomaticOutput_Enable) || \
360 ((STATE) == TIM_AutomaticOutput_Disable))
361
369 #define TIM_LOCKLevel_OFF ((uint16_t)0x0000)
370 #define TIM_LOCKLevel_1 ((uint16_t)0x0100)
371 #define TIM_LOCKLevel_2 ((uint16_t)0x0200)
372 #define TIM_LOCKLevel_3 ((uint16_t)0x0300)
373 #define IS_TIM_LOCK_LEVEL(LEVEL) (((LEVEL) == TIM_LOCKLevel_OFF) || \
374 ((LEVEL) == TIM_LOCKLevel_1) || \
375 ((LEVEL) == TIM_LOCKLevel_2) || \
376 ((LEVEL) == TIM_LOCKLevel_3))
377
385 #define TIM_OSSIState_Enable ((uint16_t)0x0400)
386 #define TIM_OSSIState_Disable ((uint16_t)0x0000)
387 #define IS_TIM_OSSI_STATE(STATE) (((STATE) == TIM_OSSIState_Enable) || \
388 ((STATE) == TIM_OSSIState_Disable))
389
397 #define TIM_OSSRState_Enable ((uint16_t)0x0800)
398 #define TIM_OSSRState_Disable ((uint16_t)0x0000)
399 #define IS_TIM_OSSR_STATE(STATE) (((STATE) == TIM_OSSRState_Enable) || \
400 ((STATE) == TIM_OSSRState_Disable))
401
409 #define TIM_OCIdleState_Set ((uint16_t)0x0100)
410 #define TIM_OCIdleState_Reset ((uint16_t)0x0000)
411 #define IS_TIM_OCIDLE_STATE(STATE) (((STATE) == TIM_OCIdleState_Set) || \
412 ((STATE) == TIM_OCIdleState_Reset))
413
421 #define TIM_OCNIdleState_Set ((uint16_t)0x0200)
422 #define TIM_OCNIdleState_Reset ((uint16_t)0x0000)
423 #define IS_TIM_OCNIDLE_STATE(STATE) (((STATE) == TIM_OCNIdleState_Set) || \
424 ((STATE) == TIM_OCNIdleState_Reset))
425
433 #define TIM_ICPolarity_Rising ((uint16_t)0x0000)
434 #define TIM_ICPolarity_Falling ((uint16_t)0x0002)
435 #define TIM_ICPolarity_BothEdge ((uint16_t)0x000A)
436 #define IS_TIM_IC_POLARITY(POLARITY) (((POLARITY) == TIM_ICPolarity_Rising) || \
437 ((POLARITY) == TIM_ICPolarity_Falling))
438
446 #define TIM_ICSelection_DirectTI ((uint16_t)0x0001)
448 #define TIM_ICSelection_IndirectTI ((uint16_t)0x0002)
450 #define TIM_ICSelection_TRC ((uint16_t)0x0003)
451 #define IS_TIM_IC_SELECTION(SELECTION) (((SELECTION) == TIM_ICSelection_DirectTI) || \
452 ((SELECTION) == TIM_ICSelection_IndirectTI) || \
453 ((SELECTION) == TIM_ICSelection_TRC))
454
462 #define TIM_ICPSC_DIV1 ((uint16_t)0x0000)
463 #define TIM_ICPSC_DIV2 ((uint16_t)0x0004)
464 #define TIM_ICPSC_DIV4 ((uint16_t)0x0008)
465 #define TIM_ICPSC_DIV8 ((uint16_t)0x000C)
466 #define IS_TIM_IC_PRESCALER(PRESCALER) (((PRESCALER) == TIM_ICPSC_DIV1) || \
467 ((PRESCALER) == TIM_ICPSC_DIV2) || \
468 ((PRESCALER) == TIM_ICPSC_DIV4) || \
469 ((PRESCALER) == TIM_ICPSC_DIV8))
470
478 #define TIM_IT_Update ((uint16_t)0x0001)
479 #define TIM_IT_CC1 ((uint16_t)0x0002)
480 #define TIM_IT_CC2 ((uint16_t)0x0004)
481 #define TIM_IT_CC3 ((uint16_t)0x0008)
482 #define TIM_IT_CC4 ((uint16_t)0x0010)
483 #define TIM_IT_COM ((uint16_t)0x0020)
484 #define TIM_IT_Trigger ((uint16_t)0x0040)
485 #define TIM_IT_Break ((uint16_t)0x0080)
486 #define IS_TIM_IT(IT) ((((IT) & (uint16_t)0xFF00) == 0x0000) && ((IT) != 0x0000))
487
488 #define IS_TIM_GET_IT(IT) (((IT) == TIM_IT_Update) || \
489 ((IT) == TIM_IT_CC1) || \
490 ((IT) == TIM_IT_CC2) || \
491 ((IT) == TIM_IT_CC3) || \
492 ((IT) == TIM_IT_CC4) || \
493 ((IT) == TIM_IT_COM) || \
494 ((IT) == TIM_IT_Trigger) || \
495 ((IT) == TIM_IT_Break))
496
504 #define TIM_DMA_Update ((uint16_t)0x0100)
505 #define TIM_DMA_CC1 ((uint16_t)0x0200)
506 #define TIM_DMA_CC2 ((uint16_t)0x0400)
507 #define TIM_DMA_CC3 ((uint16_t)0x0800)
508 #define TIM_DMA_CC4 ((uint16_t)0x1000)
509 #define TIM_DMA_COM ((uint16_t)0x2000)
510 #define TIM_DMA_Trigger ((uint16_t)0x4000)
511 #define IS_TIM_DMA_SOURCE(SOURCE) ((((SOURCE) & (uint16_t)0x80FF) == 0x0000) && ((SOURCE) != 0x0000))
512
521 #define TIM_ExtTRGPSC_OFF ((uint16_t)0x0000)
522 #define TIM_ExtTRGPSC_DIV2 ((uint16_t)0x1000)
523 #define TIM_ExtTRGPSC_DIV4 ((uint16_t)0x2000)
524 #define TIM_ExtTRGPSC_DIV8 ((uint16_t)0x3000)
525 #define IS_TIM_EXT_PRESCALER(PRESCALER) (((PRESCALER) == TIM_ExtTRGPSC_OFF) || \
526 ((PRESCALER) == TIM_ExtTRGPSC_DIV2) || \
527 ((PRESCALER) == TIM_ExtTRGPSC_DIV4) || \
528 ((PRESCALER) == TIM_ExtTRGPSC_DIV8))
529
537 #define TIM_TS_ITR0 ((uint16_t)0x0000)
538 #define TIM_TS_ITR1 ((uint16_t)0x0010)
539 #define TIM_TS_ITR2 ((uint16_t)0x0020)
540 #define TIM_TS_ITR3 ((uint16_t)0x0030)
541 #define TIM_TS_TI1F_ED ((uint16_t)0x0040)
542 #define TIM_TS_TI1FP1 ((uint16_t)0x0050)
543 #define TIM_TS_TI2FP2 ((uint16_t)0x0060)
544 #define TIM_TS_ETRF ((uint16_t)0x0070)
545 #define IS_TIM_TRIGGER_SELECTION(SELECTION) (((SELECTION) == TIM_TS_ITR0) || \
546 ((SELECTION) == TIM_TS_ITR1) || \
547 ((SELECTION) == TIM_TS_ITR2) || \
548 ((SELECTION) == TIM_TS_ITR3) || \
549 ((SELECTION) == TIM_TS_TI1F_ED) || \
550 ((SELECTION) == TIM_TS_TI1FP1) || \
551 ((SELECTION) == TIM_TS_TI2FP2) || \
552 ((SELECTION) == TIM_TS_ETRF))
553 #define IS_TIM_INTERNAL_TRIGGER_SELECTION(SELECTION) (((SELECTION) == TIM_TS_ITR0) || \
554 ((SELECTION) == TIM_TS_ITR1) || \
555 ((SELECTION) == TIM_TS_ITR2) || \
556 ((SELECTION) == TIM_TS_ITR3))
557
565 #define TIM_TIxExternalCLK1Source_TI1 ((uint16_t)0x0050)
566 #define TIM_TIxExternalCLK1Source_TI2 ((uint16_t)0x0060)
567 #define TIM_TIxExternalCLK1Source_TI1ED ((uint16_t)0x0040)
568 #define IS_TIM_TIXCLK_SOURCE(SOURCE) (((SOURCE) == TIM_TIxExternalCLK1Source_TI1) || \
569 ((SOURCE) == TIM_TIxExternalCLK1Source_TI2) || \
570 ((SOURCE) == TIM_TIxExternalCLK1Source_TI1ED))
571
578 #define TIM_ExtTRGPolarity_Inverted ((uint16_t)0x8000)
579 #define TIM_ExtTRGPolarity_NonInverted ((uint16_t)0x0000)
580 #define IS_TIM_EXT_POLARITY(POLARITY) (((POLARITY) == TIM_ExtTRGPolarity_Inverted) || \
581 ((POLARITY) == TIM_ExtTRGPolarity_NonInverted))
582
590 #define TIM_PSCReloadMode_Update ((uint16_t)0x0000)
591 #define TIM_PSCReloadMode_Immediate ((uint16_t)0x0001)
592 #define IS_TIM_PRESCALER_RELOAD(RELOAD) (((RELOAD) == TIM_PSCReloadMode_Update) || \
593 ((RELOAD) == TIM_PSCReloadMode_Immediate))
594
602 #define TIM_ForcedAction_Active ((uint16_t)0x0050)
603 #define TIM_ForcedAction_InActive ((uint16_t)0x0040)
604 #define IS_TIM_FORCED_ACTION(ACTION) (((ACTION) == TIM_ForcedAction_Active) || \
605 ((ACTION) == TIM_ForcedAction_InActive))
606
614 #define TIM_EncoderMode_TI1 ((uint16_t)0x0001)
615 #define TIM_EncoderMode_TI2 ((uint16_t)0x0002)
616 #define TIM_EncoderMode_TI12 ((uint16_t)0x0003)
617 #define IS_TIM_ENCODER_MODE(MODE) (((MODE) == TIM_EncoderMode_TI1) || \
618 ((MODE) == TIM_EncoderMode_TI2) || \
619 ((MODE) == TIM_EncoderMode_TI12))
620
629 #define TIM_EventSource_Update ((uint16_t)0x0001)
630 #define TIM_EventSource_CC1 ((uint16_t)0x0002)
631 #define TIM_EventSource_CC2 ((uint16_t)0x0004)
632 #define TIM_EventSource_CC3 ((uint16_t)0x0008)
633 #define TIM_EventSource_CC4 ((uint16_t)0x0010)
634 #define TIM_EventSource_COM ((uint16_t)0x0020)
635 #define TIM_EventSource_Trigger ((uint16_t)0x0040)
636 #define TIM_EventSource_Break ((uint16_t)0x0080)
637 #define IS_TIM_EVENT_SOURCE(SOURCE) ((((SOURCE) & (uint16_t)0xFF00) == 0x0000) && ((SOURCE) != 0x0000))
638
647 #define TIM_UpdateSource_Global ((uint16_t)0x0000)
650 #define TIM_UpdateSource_Regular ((uint16_t)0x0001)
651 #define IS_TIM_UPDATE_SOURCE(SOURCE) (((SOURCE) == TIM_UpdateSource_Global) || \
652 ((SOURCE) == TIM_UpdateSource_Regular))
653
661 #define TIM_OCPreload_Enable ((uint16_t)0x0008)
662 #define TIM_OCPreload_Disable ((uint16_t)0x0000)
663 #define IS_TIM_OCPRELOAD_STATE(STATE) (((STATE) == TIM_OCPreload_Enable) || \
664 ((STATE) == TIM_OCPreload_Disable))
665
673 #define TIM_OCFast_Enable ((uint16_t)0x0004)
674 #define TIM_OCFast_Disable ((uint16_t)0x0000)
675 #define IS_TIM_OCFAST_STATE(STATE) (((STATE) == TIM_OCFast_Enable) || \
676 ((STATE) == TIM_OCFast_Disable))
677
686 #define TIM_OCClear_Enable ((uint16_t)0x0080)
687 #define TIM_OCClear_Disable ((uint16_t)0x0000)
688 #define IS_TIM_OCCLEAR_STATE(STATE) (((STATE) == TIM_OCClear_Enable) || \
689 ((STATE) == TIM_OCClear_Disable))
690
698 #define TIM_TRGOSource_Reset ((uint16_t)0x0000)
699 #define TIM_TRGOSource_Enable ((uint16_t)0x0010)
700 #define TIM_TRGOSource_Update ((uint16_t)0x0020)
701 #define TIM_TRGOSource_OC1 ((uint16_t)0x0030)
702 #define TIM_TRGOSource_OC1Ref ((uint16_t)0x0040)
703 #define TIM_TRGOSource_OC2Ref ((uint16_t)0x0050)
704 #define TIM_TRGOSource_OC3Ref ((uint16_t)0x0060)
705 #define TIM_TRGOSource_OC4Ref ((uint16_t)0x0070)
706 #define IS_TIM_TRGO_SOURCE(SOURCE) (((SOURCE) == TIM_TRGOSource_Reset) || \
707 ((SOURCE) == TIM_TRGOSource_Enable) || \
708 ((SOURCE) == TIM_TRGOSource_Update) || \
709 ((SOURCE) == TIM_TRGOSource_OC1) || \
710 ((SOURCE) == TIM_TRGOSource_OC1Ref) || \
711 ((SOURCE) == TIM_TRGOSource_OC2Ref) || \
712 ((SOURCE) == TIM_TRGOSource_OC3Ref) || \
713 ((SOURCE) == TIM_TRGOSource_OC4Ref))
714
722 #define TIM_SlaveMode_Reset ((uint16_t)0x0004)
723 #define TIM_SlaveMode_Gated ((uint16_t)0x0005)
724 #define TIM_SlaveMode_Trigger ((uint16_t)0x0006)
725 #define TIM_SlaveMode_External1 ((uint16_t)0x0007)
726 #define IS_TIM_SLAVE_MODE(MODE) (((MODE) == TIM_SlaveMode_Reset) || \
727 ((MODE) == TIM_SlaveMode_Gated) || \
728 ((MODE) == TIM_SlaveMode_Trigger) || \
729 ((MODE) == TIM_SlaveMode_External1))
730
738 #define TIM_MasterSlaveMode_Enable ((uint16_t)0x0080)
739 #define TIM_MasterSlaveMode_Disable ((uint16_t)0x0000)
740 #define IS_TIM_MSM_STATE(STATE) (((STATE) == TIM_MasterSlaveMode_Enable) || \
741 ((STATE) == TIM_MasterSlaveMode_Disable))
742
750 #define TIM_FLAG_Update ((uint16_t)0x0001)
751 #define TIM_FLAG_CC1 ((uint16_t)0x0002)
752 #define TIM_FLAG_CC2 ((uint16_t)0x0004)
753 #define TIM_FLAG_CC3 ((uint16_t)0x0008)
754 #define TIM_FLAG_CC4 ((uint16_t)0x0010)
755 #define TIM_FLAG_COM ((uint16_t)0x0020)
756 #define TIM_FLAG_Trigger ((uint16_t)0x0040)
757 #define TIM_FLAG_Break ((uint16_t)0x0080)
758 #define TIM_FLAG_CC1OF ((uint16_t)0x0200)
759 #define TIM_FLAG_CC2OF ((uint16_t)0x0400)
760 #define TIM_FLAG_CC3OF ((uint16_t)0x0800)
761 #define TIM_FLAG_CC4OF ((uint16_t)0x1000)
762 #define IS_TIM_GET_FLAG(FLAG) (((FLAG) == TIM_FLAG_Update) || \
763 ((FLAG) == TIM_FLAG_CC1) || \
764 ((FLAG) == TIM_FLAG_CC2) || \
765 ((FLAG) == TIM_FLAG_CC3) || \
766 ((FLAG) == TIM_FLAG_CC4) || \
767 ((FLAG) == TIM_FLAG_COM) || \
768 ((FLAG) == TIM_FLAG_Trigger) || \
769 ((FLAG) == TIM_FLAG_Break) || \
770 ((FLAG) == TIM_FLAG_CC1OF) || \
771 ((FLAG) == TIM_FLAG_CC2OF) || \
772 ((FLAG) == TIM_FLAG_CC3OF) || \
773 ((FLAG) == TIM_FLAG_CC4OF))
774
775
776 #define IS_TIM_CLEAR_FLAG(TIM_FLAG) ((((TIM_FLAG) & (uint16_t)0xE100) == 0x0000) && ((TIM_FLAG) != 0x0000))
777
785 #define IS_TIM_IC_FILTER(ICFILTER) ((ICFILTER) <= 0xF)
786
794 #define IS_TIM_EXT_FILTER(EXTFILTER) ((EXTFILTER) <= 0xF)
795
803 /* Exported macro ------------------------------------------------------------*/
804 /* Exported functions --------------------------------------------------------*/
805
806 void TIM_DeInit(TIM_TypeDef* TIMx);
807 void TIM_TimeBaseInit(TIM_TypeDef* TIMx, TIM_TimeBaseInitTypeDef* TIM_TimeBaseInitStruct);
808 void TIM_OC1Init(TIM_TypeDef* TIMx, TIM_OCInitTypeDef* TIM_OCInitStruct);
809 void TIM_OC2Init(TIM_TypeDef* TIMx, TIM_OCInitTypeDef* TIM_OCInitStruct);
810 void TIM_OC3Init(TIM_TypeDef* TIMx, TIM_OCInitTypeDef* TIM_OCInitStruct);
811 void TIM_OC4Init(TIM_TypeDef* TIMx, TIM_OCInitTypeDef* TIM_OCInitStruct);
812 void TIM_ICInit(TIM_TypeDef* TIMx, TIM_ICInitTypeDef* TIM_ICInitStruct);
813 void TIM_PWMIConfig(TIM_TypeDef* TIMx, TIM_ICInitTypeDef* TIM_ICInitStruct);
814 void TIM_BDTRConfig(TIM_TypeDef* TIMx, TIM_BDTRInitTypeDef *TIM_BDTRInitStruct);
815 void TIM_TimeBaseStructInit(TIM_TimeBaseInitTypeDef* TIM_TimeBaseInitStruct);
816 void TIM_OCStructInit(TIM_OCInitTypeDef* TIM_OCInitStruct);
817 void TIM_ICStructInit(TIM_ICInitTypeDef* TIM_ICInitStruct);
818 void TIM_BDTRStructInit(TIM_BDTRInitTypeDef* TIM_BDTRInitStruct);
819 void TIM_Cmd(TIM_TypeDef* TIMx, FunctionalState NewState);
820 void TIM_CtrlPWMOutputs(TIM_TypeDef* TIMx, FunctionalState NewState);
821 void TIM_ITConfig(TIM_TypeDef* TIMx, uint16_t TIM_IT, FunctionalState NewState);
822 void TIM_GenerateEvent(TIM_TypeDef* TIMx, uint16_t TIM_EventSource);
823 void TIM_DMACmd(TIM_TypeDef* TIMx, uint16_t TIM_DMASource, FunctionalState NewState);
824 void TIM_InternalClockConfig(TIM_TypeDef* TIMx);
825 void TIM_ITRxExternalClockConfig(TIM_TypeDef* TIMx, uint16_t TIM_InputTriggerSource);
826 void TIM_TIxExternalClockConfig(TIM_TypeDef* TIMx, uint16_t TIM_TIxExternalCLKSource,
827 uint16_t TIM_ICPolarity, uint16_t ICFilter);
828 void TIM_ETRClockMode1Config(TIM_TypeDef* TIMx, uint16_t TIM_ExtTRGPrescaler, uint16_t TIM_ExtTRGPolarity,
829 uint16_t ExtTRGFilter);
830 void TIM_ETRClockMode2Config(TIM_TypeDef* TIMx, uint16_t TIM_ExtTRGPrescaler,
831 uint16_t TIM_ExtTRGPolarity, uint16_t ExtTRGFilter);
832 void TIM_ETRConfig(TIM_TypeDef* TIMx, uint16_t TIM_ExtTRGPrescaler, uint16_t TIM_ExtTRGPolarity,
833 uint16_t ExtTRGFilter);
834 void TIM_PrescalerConfig(TIM_TypeDef* TIMx, uint16_t Prescaler, uint16_t TIM_PSCReloadMode);
835 void TIM_CounterModeConfig(TIM_TypeDef* TIMx, uint16_t TIM_CounterMode);
836 void TIM_SelectInputTrigger(TIM_TypeDef* TIMx, uint16_t TIM_InputTriggerSource);
837 void TIM_EncoderInterfaceConfig(TIM_TypeDef* TIMx, uint16_t TIM_EncoderMode,
838 uint16_t TIM_IC1Polarity, uint16_t TIM_IC2Polarity);
839 void TIM_ForcedOC1Config(TIM_TypeDef* TIMx, uint16_t TIM_ForcedAction);
840 void TIM_ForcedOC2Config(TIM_TypeDef* TIMx, uint16_t TIM_ForcedAction);
841 void TIM_ForcedOC3Config(TIM_TypeDef* TIMx, uint16_t TIM_ForcedAction);
842 void TIM_ForcedOC4Config(TIM_TypeDef* TIMx, uint16_t TIM_ForcedAction);
843 void TIM_ARRPreloadConfig(TIM_TypeDef* TIMx, FunctionalState NewState);
844 void TIM_SelectCOM(TIM_TypeDef* TIMx, FunctionalState NewState);
845 void TIM_SelectCCDMA(TIM_TypeDef* TIMx, FunctionalState NewState);
846 void TIM_CCPreloadControl(TIM_TypeDef* TIMx, FunctionalState NewState);
847 void TIM_OC1PreloadConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPreload);
848 void TIM_OC2PreloadConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPreload);
849 void TIM_OC3PreloadConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPreload);
850 void TIM_OC4PreloadConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPreload);
851 void TIM_OC1FastConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCFast);
852 void TIM_OC2FastConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCFast);
853 void TIM_OC3FastConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCFast);
854 void TIM_OC4FastConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCFast);
855 void TIM_ClearOC1Ref(TIM_TypeDef* TIMx, uint16_t TIM_OCClear);
856 void TIM_ClearOC2Ref(TIM_TypeDef* TIMx, uint16_t TIM_OCClear);
857 void TIM_ClearOC3Ref(TIM_TypeDef* TIMx, uint16_t TIM_OCClear);
858 void TIM_ClearOC4Ref(TIM_TypeDef* TIMx, uint16_t TIM_OCClear);
859 void TIM_OC1PolarityConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPolarity);
860 void TIM_OC1NPolarityConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCNPolarity);
861 void TIM_OC2PolarityConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPolarity);
862 void TIM_OC2NPolarityConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCNPolarity);
863 void TIM_OC3PolarityConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPolarity);
864 void TIM_OC3NPolarityConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCNPolarity);
865 void TIM_OC4PolarityConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPolarity);
866 void TIM_CCxCmd(TIM_TypeDef* TIMx, uint16_t TIM_Channel, uint16_t TIM_CCx);
867 void TIM_CCxNCmd(TIM_TypeDef* TIMx, uint16_t TIM_Channel, uint16_t TIM_CCxN);
868 void TIM_SelectOCxM(TIM_TypeDef* TIMx, uint16_t TIM_Channel, uint16_t TIM_OCMode);
869 void TIM_UpdateDisableConfig(TIM_TypeDef* TIMx, FunctionalState NewState);
870 void TIM_UpdateRequestConfig(TIM_TypeDef* TIMx, uint16_t TIM_UpdateSource);
871 void TIM_SelectHallSensor(TIM_TypeDef* TIMx, FunctionalState NewState);
872 void TIM_SelectOnePulseMode(TIM_TypeDef* TIMx, uint16_t TIM_OPMode);
873 void TIM_SelectOutputTrigger(TIM_TypeDef* TIMx, uint16_t TIM_TRGOSource);
874 void TIM_SelectSlaveMode(TIM_TypeDef* TIMx, uint16_t TIM_SlaveMode);
875 void TIM_SelectMasterSlaveMode(TIM_TypeDef* TIMx, uint16_t TIM_MasterSlaveMode);
876 void TIM_SetCounter(TIM_TypeDef* TIMx, uint32_t Counter);
877 void TIM_SetAutoreload(TIM_TypeDef* TIMx, uint32_t Autoreload);
878 void TIM_SetCompare1(TIM_TypeDef* TIMx, uint32_t Compare1);
879 void TIM_SetCompare2(TIM_TypeDef* TIMx, uint32_t Compare2);
880 void TIM_SetCompare3(TIM_TypeDef* TIMx, uint32_t Compare3);
881 void TIM_SetCompare4(TIM_TypeDef* TIMx, uint32_t Compare4);
882 void TIM_SetIC1Prescaler(TIM_TypeDef* TIMx, uint16_t TIM_ICPSC);
883 void TIM_SetIC2Prescaler(TIM_TypeDef* TIMx, uint16_t TIM_ICPSC);
884 void TIM_SetIC3Prescaler(TIM_TypeDef* TIMx, uint16_t TIM_ICPSC);
885 void TIM_SetIC4Prescaler(TIM_TypeDef* TIMx, uint16_t TIM_ICPSC);
886 void TIM_SetClockDivision(TIM_TypeDef* TIMx, uint16_t TIM_CKD);
887 uint32_t TIM_GetCapture1(TIM_TypeDef* TIMx);
888 uint32_t TIM_GetCapture2(TIM_TypeDef* TIMx);
889 uint32_t TIM_GetCapture3(TIM_TypeDef* TIMx);
890 uint32_t TIM_GetCapture4(TIM_TypeDef* TIMx);
891 uint32_t TIM_GetCounter(TIM_TypeDef* TIMx);
892 uint16_t TIM_GetPrescaler(TIM_TypeDef* TIMx);
893 FlagStatus TIM_GetFlagStatus(TIM_TypeDef* TIMx, uint16_t TIM_FLAG);
894 void TIM_ClearFlag(TIM_TypeDef* TIMx, uint16_t TIM_FLAG);
895 ITStatus TIM_GetITStatus(TIM_TypeDef* TIMx, uint16_t TIM_IT);
896 void TIM_ClearITPendingBit(TIM_TypeDef* TIMx, uint16_t TIM_IT);
897
906 #ifdef __cplusplus
907 }
908 #endif
909
910 #endif /*__MG32F10x_TIM_H */
TIM_BDTRInitTypeDef::TIM_Break
uint16_t TIM_Break
Definition: mg32f10x_tim.h:139
TIM_SelectHallSensor
void TIM_SelectHallSensor(TIM_TypeDef *TIMx, FunctionalState NewState)
Enables or disables the TIMx's Hall sensor interface.
Definition: mg32f10x_tim.c:1965
TIM_CtrlPWMOutputs
void TIM_CtrlPWMOutputs(TIM_TypeDef *TIMx, FunctionalState NewState)
Enables or disables the TIM peripheral Main Outputs.
Definition: mg32f10x_tim.c:691
TIM_SelectCCDMA
void TIM_SelectCCDMA(TIM_TypeDef *TIMx, FunctionalState NewState)
Selects the TIMx peripheral Capture Compare DMA source.
Definition: mg32f10x_tim.c:1282
TIM_BDTRInitTypeDef::TIM_BreakPolarity
uint16_t TIM_BreakPolarity
Definition: mg32f10x_tim.h:142
TIM_SetCompare2
void TIM_SetCompare2(TIM_TypeDef *TIMx, uint32_t Compare2)
Sets the TIMx Capture Compare2 Register value
Definition: mg32f10x_tim.c:2122
TIM_Cmd
void TIM_Cmd(TIM_TypeDef *TIMx, FunctionalState NewState)
Enables or disables the specified TIM peripheral.
Definition: mg32f10x_tim.c:666
TIM_BDTRInitTypeDef::TIM_DeadTime
uint16_t TIM_DeadTime
Definition: mg32f10x_tim.h:135
TIM_ClearOC4Ref
void TIM_ClearOC4Ref(TIM_TypeDef *TIMx, uint16_t TIM_OCClear)
Clears or safeguards the OCREF4 signal on an external event
Definition: mg32f10x_tim.c:1602
TIM_OC3FastConfig
void TIM_OC3FastConfig(TIM_TypeDef *TIMx, uint16_t TIM_OCFast)
Configures the TIMx Output Compare 3 Fast feature.
Definition: mg32f10x_tim.c:1478
TIM_TimeBaseInitTypeDef::TIM_Prescaler
uint16_t TIM_Prescaler
Definition: mg32f10x_tim.h:37
TIM_GetPrescaler
uint16_t TIM_GetPrescaler(TIM_TypeDef *TIMx)
Gets the TIMx Prescaler value.
Definition: mg32f10x_tim.c:2337
TIM_SetIC2Prescaler
void TIM_SetIC2Prescaler(TIM_TypeDef *TIMx, uint16_t TIM_ICPSC)
Sets the TIMx Input Capture 2 prescaler.
Definition: mg32f10x_tim.c:2191
TIM_SetIC3Prescaler
void TIM_SetIC3Prescaler(TIM_TypeDef *TIMx, uint16_t TIM_ICPSC)
Sets the TIMx Input Capture 3 prescaler.
Definition: mg32f10x_tim.c:2213
TIM_OC3PolarityConfig
void TIM_OC3PolarityConfig(TIM_TypeDef *TIMx, uint16_t TIM_OCPolarity)
Configures the TIMx channel 3 polarity.
Definition: mg32f10x_tim.c:1720
TIM_GetCapture2
uint32_t TIM_GetCapture2(TIM_TypeDef *TIMx)
Gets the TIMx Input Capture 2 value.
Definition: mg32f10x_tim.c:2285
TIM_ICInitTypeDef::TIM_ICPolarity
uint16_t TIM_ICPolarity
Definition: mg32f10x_tim.h:105
TIM_BDTRInitTypeDef::TIM_OSSRState
uint16_t TIM_OSSRState
Definition: mg32f10x_tim.h:126
TIM_OCStructInit
void TIM_OCStructInit(TIM_OCInitTypeDef *TIM_OCInitStruct)
Fills each TIM_OCInitStruct member with its default value.
Definition: mg32f10x_tim.c:612
TIM_OC3Init
void TIM_OC3Init(TIM_TypeDef *TIMx, TIM_OCInitTypeDef *TIM_OCInitStruct)
Initializes the TIMx Channel3 according to the specified parameters in the TIM_OCInitStruct.
Definition: mg32f10x_tim.c:315
TIM_ClearOC1Ref
void TIM_ClearOC1Ref(TIM_TypeDef *TIMx, uint16_t TIM_OCClear)
Clears or safeguards the OCREF1 signal on an external event
Definition: mg32f10x_tim.c:1528
TIM_SelectOnePulseMode
void TIM_SelectOnePulseMode(TIM_TypeDef *TIMx, uint16_t TIM_OPMode)
Selects the TIMx's One Pulse Mode.
Definition: mg32f10x_tim.c:1991
TIM_TimeBaseInitTypeDef::TIM_Period
uint32_t TIM_Period
Definition: mg32f10x_tim.h:43
TIM_OC3PreloadConfig
void TIM_OC3PreloadConfig(TIM_TypeDef *TIMx, uint16_t TIM_OCPreload)
Enables or disables the TIMx peripheral Preload register on CCR3.
Definition: mg32f10x_tim.c:1380
TIM_OC2NPolarityConfig
void TIM_OC2NPolarityConfig(TIM_TypeDef *TIMx, uint16_t TIM_OCNPolarity)
Configures the TIMx Channel 2N polarity.
Definition: mg32f10x_tim.c:1696
TIM_ITRxExternalClockConfig
void TIM_ITRxExternalClockConfig(TIM_TypeDef *TIMx, uint16_t TIM_InputTriggerSource)
Configures the TIMx Internal Trigger as External Clock
Definition: mg32f10x_tim.c:833
TIM_SelectCOM
void TIM_SelectCOM(TIM_TypeDef *TIMx, FunctionalState NewState)
Selects the TIM peripheral Commutation event.
Definition: mg32f10x_tim.c:1258
TIM_OC4FastConfig
void TIM_OC4FastConfig(TIM_TypeDef *TIMx, uint16_t TIM_OCFast)
Configures the TIMx Output Compare 4 Fast feature.
Definition: mg32f10x_tim.c:1503
TIM_ForcedOC3Config
void TIM_ForcedOC3Config(TIM_TypeDef *TIMx, uint16_t TIM_ForcedAction)
Forces the TIMx output 3 waveform to active or inactive level.
Definition: mg32f10x_tim.c:1188
TIM_ETRConfig
void TIM_ETRConfig(TIM_TypeDef *TIMx, uint16_t TIM_ExtTRGPrescaler, uint16_t TIM_ExtTRGPolarity, uint16_t ExtTRGFilter)
Configures the TIMx External Trigger (ETR).
Definition: mg32f10x_tim.c:973
TIM_ARRPreloadConfig
void TIM_ARRPreloadConfig(TIM_TypeDef *TIMx, FunctionalState NewState)
Enables or disables TIMx peripheral Preload register on ARR.
Definition: mg32f10x_tim.c:1234
TIM_GetCapture3
uint32_t TIM_GetCapture3(TIM_TypeDef *TIMx)
Gets the TIMx Input Capture 3 value.
Definition: mg32f10x_tim.c:2298
TIM_CCxCmd
void TIM_CCxCmd(TIM_TypeDef *TIMx, uint16_t TIM_Channel, uint16_t TIM_CCx)
Enables or disables the TIM Capture Compare Channel x.
Definition: mg32f10x_tim.c:1795
TIM_ETRClockMode2Config
void TIM_ETRClockMode2Config(TIM_TypeDef *TIMx, uint16_t TIM_ExtTRGPrescaler, uint16_t TIM_ExtTRGPolarity, uint16_t ExtTRGFilter)
Configures the External clock Mode2
Definition: mg32f10x_tim.c:942
TIM_ForcedOC2Config
void TIM_ForcedOC2Config(TIM_TypeDef *TIMx, uint16_t TIM_ForcedAction)
Forces the TIMx output 2 waveform to active or inactive level.
Definition: mg32f10x_tim.c:1164
TIM_PrescalerConfig
void TIM_PrescalerConfig(TIM_TypeDef *TIMx, uint16_t Prescaler, uint16_t TIM_PSCReloadMode)
Configures the TIMx Prescaler.
Definition: mg32f10x_tim.c:1001
TIM_OCInitTypeDef::TIM_OCNPolarity
uint16_t TIM_OCNPolarity
Definition: mg32f10x_tim.h:82
TIM_OCInitTypeDef::TIM_OCNIdleState
uint16_t TIM_OCNIdleState
Definition: mg32f10x_tim.h:90
TIM_OC1Init
void TIM_OC1Init(TIM_TypeDef *TIMx, TIM_OCInitTypeDef *TIM_OCInitStruct)
Initializes the TIMx Channel1 according to the specified parameters in the TIM_OCInitStruct.
Definition: mg32f10x_tim.c:152
TIM_TimeBaseInitTypeDef::TIM_ClockDivision
uint16_t TIM_ClockDivision
Definition: mg32f10x_tim.h:47
TIM_OC2Init
void TIM_OC2Init(TIM_TypeDef *TIMx, TIM_OCInitTypeDef *TIM_OCInitStruct)
Initializes the TIMx Channel2 according to the specified parameters in the TIM_OCInitStruct.
Definition: mg32f10x_tim.c:233
TIM_ICStructInit
void TIM_ICStructInit(TIM_ICInitTypeDef *TIM_ICInitStruct)
Fills each TIM_ICInitStruct member with its default value.
Definition: mg32f10x_tim.c:631
TIM_DMACmd
void TIM_DMACmd(TIM_TypeDef *TIMx, uint16_t TIM_DMASource, FunctionalState NewState)
Enables or disables the TIMx's DMA Requests.
Definition: mg32f10x_tim.c:790
TIM_SetCounter
void TIM_SetCounter(TIM_TypeDef *TIMx, uint32_t Counter)
Sets the TIMx Counter Register value
Definition: mg32f10x_tim.c:2080
TIM_ICInitTypeDef::TIM_ICPrescaler
uint16_t TIM_ICPrescaler
Definition: mg32f10x_tim.h:111
TIM_SetCompare3
void TIM_SetCompare3(TIM_TypeDef *TIMx, uint32_t Compare3)
Sets the TIMx Capture Compare3 Register value
Definition: mg32f10x_tim.c:2136
TIM_ETRClockMode1Config
void TIM_ETRClockMode1Config(TIM_TypeDef *TIMx, uint16_t TIM_ExtTRGPrescaler, uint16_t TIM_ExtTRGPolarity, uint16_t ExtTRGFilter)
Configures the External clock Mode1
Definition: mg32f10x_tim.c:900
TIM_UpdateDisableConfig
void TIM_UpdateDisableConfig(TIM_TypeDef *TIMx, FunctionalState NewState)
Enables or Disables the TIMx Update event.
Definition: mg32f10x_tim.c:1913
TIM_ForcedOC1Config
void TIM_ForcedOC1Config(TIM_TypeDef *TIMx, uint16_t TIM_ForcedAction)
Forces the TIMx output 1 waveform to active or inactive level.
Definition: mg32f10x_tim.c:1140
TIM_ICInit
void TIM_ICInit(TIM_TypeDef *TIMx, TIM_ICInitTypeDef *TIM_ICInitStruct)
Initializes the TIM peripheral according to the specified parameters in the TIM_ICInitStruct.
Definition: mg32f10x_tim.c:458
TIM_BDTRInitTypeDef::TIM_OSSIState
uint16_t TIM_OSSIState
Definition: mg32f10x_tim.h:129
TIM_ClearFlag
void TIM_ClearFlag(TIM_TypeDef *TIMx, uint16_t TIM_FLAG)
Clears the TIMx's pending flags.
Definition: mg32f10x_tim.c:2407
TIM_SetIC4Prescaler
void TIM_SetIC4Prescaler(TIM_TypeDef *TIMx, uint16_t TIM_ICPSC)
Sets the TIMx Input Capture 4 prescaler.
Definition: mg32f10x_tim.c:2235
TIM_OCInitTypeDef::TIM_Pulse
uint32_t TIM_Pulse
Definition: mg32f10x_tim.h:76
TIM_ClearOC3Ref
void TIM_ClearOC3Ref(TIM_TypeDef *TIMx, uint16_t TIM_OCClear)
Clears or safeguards the OCREF3 signal on an external event
Definition: mg32f10x_tim.c:1578
TIM_OCInitTypeDef
TIM Output Compare Init structure definition
Definition: mg32f10x_tim.h:64
TIM_BDTRConfig
void TIM_BDTRConfig(TIM_TypeDef *TIMx, TIM_BDTRInitTypeDef *TIM_BDTRInitStruct)
Configures the: Break feature, dead time, Lock level, the OSSI, the OSSR State and the AOE(automatic ...
Definition: mg32f10x_tim.c:572
TIM_TimeBaseInitTypeDef
TIM Time Base Init structure definition
Definition: mg32f10x_tim.h:35
TIM_CCPreloadControl
void TIM_CCPreloadControl(TIM_TypeDef *TIMx, FunctionalState NewState)
Sets or Resets the TIM peripheral Capture Compare Preload Control bit.
Definition: mg32f10x_tim.c:1306
TIM_SelectMasterSlaveMode
void TIM_SelectMasterSlaveMode(TIM_TypeDef *TIMx, uint16_t TIM_MasterSlaveMode)
Sets or Resets the TIMx Master/Slave Mode.
Definition: mg32f10x_tim.c:2062
TIM_ClearOC2Ref
void TIM_ClearOC2Ref(TIM_TypeDef *TIMx, uint16_t TIM_OCClear)
Clears or safeguards the OCREF2 signal on an external event
Definition: mg32f10x_tim.c:1554
TIM_SetCompare1
void TIM_SetCompare1(TIM_TypeDef *TIMx, uint32_t Compare1)
Sets the TIMx Capture Compare1 Register value
Definition: mg32f10x_tim.c:2108
TIM_GetFlagStatus
FlagStatus TIM_GetFlagStatus(TIM_TypeDef *TIMx, uint16_t TIM_FLAG)
Checks whether the specified TIM flag is set or not.
Definition: mg32f10x_tim.c:2367
TIM_EncoderInterfaceConfig
void TIM_EncoderInterfaceConfig(TIM_TypeDef *TIMx, uint16_t TIM_EncoderMode, uint16_t TIM_IC1Polarity, uint16_t TIM_IC2Polarity)
Configures the TIMx Encoder Interface.
Definition: mg32f10x_tim.c:1089
TIM_SetIC1Prescaler
void TIM_SetIC1Prescaler(TIM_TypeDef *TIMx, uint16_t TIM_ICPSC)
Sets the TIMx Input Capture 1 prescaler.
Definition: mg32f10x_tim.c:2169
TIM_SetClockDivision
void TIM_SetClockDivision(TIM_TypeDef *TIMx, uint16_t TIM_CKD)
Sets the TIMx Clock Division value.
Definition: mg32f10x_tim.c:2256
TIM_TypeDef
Definition: mg32f10x.h:224
TIM_OC1PreloadConfig
void TIM_OC1PreloadConfig(TIM_TypeDef *TIMx, uint16_t TIM_OCPreload)
Enables or disables the TIMx peripheral Preload register on CCR1.
Definition: mg32f10x_tim.c:1332
TIM_ICInitTypeDef::TIM_Channel
uint16_t TIM_Channel
Definition: mg32f10x_tim.h:102
TIM_SelectOCxM
void TIM_SelectOCxM(TIM_TypeDef *TIMx, uint16_t TIM_Channel, uint16_t TIM_OCMode)
Selects the TIM Output Compare Mode.
Definition: mg32f10x_tim.c:1866
TIM_ClearITPendingBit
void TIM_ClearITPendingBit(TIM_TypeDef *TIMx, uint16_t TIM_IT)
Clears the TIMx's interrupt pending bits.
Definition: mg32f10x_tim.c:2475
TIM_OC1NPolarityConfig
void TIM_OC1NPolarityConfig(TIM_TypeDef *TIMx, uint16_t TIM_OCNPolarity)
Configures the TIMx Channel 1N polarity.
Definition: mg32f10x_tim.c:1649
TIM_GetCapture1
uint32_t TIM_GetCapture1(TIM_TypeDef *TIMx)
Gets the TIMx Input Capture 1 value.
Definition: mg32f10x_tim.c:2272
TIM_OCInitTypeDef::TIM_OCMode
uint16_t TIM_OCMode
Definition: mg32f10x_tim.h:66
TIM_GetCounter
uint32_t TIM_GetCounter(TIM_TypeDef *TIMx)
Gets the TIMx Counter value.
Definition: mg32f10x_tim.c:2324
TIM_GenerateEvent
void TIM_GenerateEvent(TIM_TypeDef *TIMx, uint16_t TIM_EventSource)
Configures the TIMx event to be generate by software.
Definition: mg32f10x_tim.c:764
TIM_BDTRInitTypeDef::TIM_LOCKLevel
uint16_t TIM_LOCKLevel
Definition: mg32f10x_tim.h:132
TIM_ICInitTypeDef::TIM_ICSelection
uint16_t TIM_ICSelection
Definition: mg32f10x_tim.h:108
TIM_UpdateRequestConfig
void TIM_UpdateRequestConfig(TIM_TypeDef *TIMx, uint16_t TIM_UpdateSource)
Configures the TIMx Update Request Interrupt source.
Definition: mg32f10x_tim.c:1941
TIM_OCInitTypeDef::TIM_OCPolarity
uint16_t TIM_OCPolarity
Definition: mg32f10x_tim.h:79
TIM_OC1PolarityConfig
void TIM_OC1PolarityConfig(TIM_TypeDef *TIMx, uint16_t TIM_OCPolarity)
Configures the TIMx channel 1 polarity.
Definition: mg32f10x_tim.c:1626
TIM_OC4PolarityConfig
void TIM_OC4PolarityConfig(TIM_TypeDef *TIMx, uint16_t TIM_OCPolarity)
Configures the TIMx channel 4 polarity.
Definition: mg32f10x_tim.c:1768
TIM_TIxExternalClockConfig
void TIM_TIxExternalClockConfig(TIM_TypeDef *TIMx, uint16_t TIM_TIxExternalCLKSource, uint16_t TIM_ICPolarity, uint16_t ICFilter)
Configures the TIMx Trigger as External Clock
Definition: mg32f10x_tim.c:860
TIM_CounterModeConfig
void TIM_CounterModeConfig(TIM_TypeDef *TIMx, uint16_t TIM_CounterMode)
Specifies the TIMx Counter Mode to be used.
Definition: mg32f10x_tim.c:1024
TIM_TimeBaseInit
void TIM_TimeBaseInit(TIM_TypeDef *TIMx, TIM_TimeBaseInitTypeDef *TIM_TimeBaseInitStruct)
Initializes the TIMx Time Base Unit peripheral according to the specified parameters in the TIM_TimeB...
Definition: mg32f10x_tim.c:106
TIM_CCxNCmd
void TIM_CCxNCmd(TIM_TypeDef *TIMx, uint16_t TIM_Channel, uint16_t TIM_CCxN)
Enables or disables the TIM Capture Compare Channel xN.
Definition: mg32f10x_tim.c:1825
TIM_GetITStatus
ITStatus TIM_GetITStatus(TIM_TypeDef *TIMx, uint16_t TIM_IT)
Checks whether the TIM interrupt has occurred or not.
Definition: mg32f10x_tim.c:2435
TIM_ForcedOC4Config
void TIM_ForcedOC4Config(TIM_TypeDef *TIMx, uint16_t TIM_ForcedAction)
Forces the TIMx output 4 waveform to active or inactive level.
Definition: mg32f10x_tim.c:1212
TIM_SelectInputTrigger
void TIM_SelectInputTrigger(TIM_TypeDef *TIMx, uint16_t TIM_InputTriggerSource)
Selects the Input Trigger source
Definition: mg32f10x_tim.c:1054
TIM_ICInitTypeDef
TIM Input Capture Init structure definition
Definition: mg32f10x_tim.h:99
TIM_SelectSlaveMode
void TIM_SelectSlaveMode(TIM_TypeDef *TIMx, uint16_t TIM_SlaveMode)
Selects the TIMx Slave Mode.
Definition: mg32f10x_tim.c:2041
TIM_BDTRStructInit
void TIM_BDTRStructInit(TIM_BDTRInitTypeDef *TIM_BDTRInitStruct)
Fills each TIM_BDTRInitStruct member with its default value.
Definition: mg32f10x_tim.c:647
TIM_OC2PolarityConfig
void TIM_OC2PolarityConfig(TIM_TypeDef *TIMx, uint16_t TIM_OCPolarity)
Configures the TIMx channel 2 polarity.
Definition: mg32f10x_tim.c:1673
TIM_SetAutoreload
void TIM_SetAutoreload(TIM_TypeDef *TIMx, uint32_t Autoreload)
Sets the TIMx Autoreload Register value
Definition: mg32f10x_tim.c:2094
TIM_DeInit
void TIM_DeInit(TIM_TypeDef *TIMx)
Deinitializes the TIMx peripheral registers to their default reset values.
Definition: mg32f10x_tim.c:70
TIM_OCInitTypeDef::TIM_OutputState
uint16_t TIM_OutputState
Definition: mg32f10x_tim.h:69
TIM_OC1FastConfig
void TIM_OC1FastConfig(TIM_TypeDef *TIMx, uint16_t TIM_OCFast)
Configures the TIMx Output Compare 1 Fast feature.
Definition: mg32f10x_tim.c:1428
TIM_GetCapture4
uint32_t TIM_GetCapture4(TIM_TypeDef *TIMx)
Gets the TIMx Input Capture 4 value.
Definition: mg32f10x_tim.c:2311
TIM_OCInitTypeDef::TIM_OCIdleState
uint16_t TIM_OCIdleState
Definition: mg32f10x_tim.h:86
TIM_BDTRInitTypeDef::TIM_AutomaticOutput
uint16_t TIM_AutomaticOutput
Definition: mg32f10x_tim.h:145
TIM_TimeBaseStructInit
void TIM_TimeBaseStructInit(TIM_TimeBaseInitTypeDef *TIM_TimeBaseInitStruct)
Fills each TIM_TimeBaseInitStruct member with its default value.
Definition: mg32f10x_tim.c:596
TIM_ITConfig
void TIM_ITConfig(TIM_TypeDef *TIMx, uint16_t TIM_IT, FunctionalState NewState)
Enables or disables the specified TIM interrupts.
Definition: mg32f10x_tim.c:728
TIM_SelectOutputTrigger
void TIM_SelectOutputTrigger(TIM_TypeDef *TIMx, uint16_t TIM_TRGOSource)
Selects the TIMx Trigger Output Mode.
Definition: mg32f10x_tim.c:2018
TIM_TimeBaseInitTypeDef::TIM_CounterMode
uint16_t TIM_CounterMode
Definition: mg32f10x_tim.h:40
TIM_InternalClockConfig
void TIM_InternalClockConfig(TIM_TypeDef *TIMx)
Configures the TIMx internal Clock
Definition: mg32f10x_tim.c:814
TIM_OC2PreloadConfig
void TIM_OC2PreloadConfig(TIM_TypeDef *TIMx, uint16_t TIM_OCPreload)
Enables or disables the TIMx peripheral Preload register on CCR2.
Definition: mg32f10x_tim.c:1356
TIM_OC2FastConfig
void TIM_OC2FastConfig(TIM_TypeDef *TIMx, uint16_t TIM_OCFast)
Configures the TIMx Output Compare 2 Fast feature.
Definition: mg32f10x_tim.c:1453
TIM_OCInitTypeDef::TIM_OutputNState
uint16_t TIM_OutputNState
Definition: mg32f10x_tim.h:72
TIM_ICInitTypeDef::TIM_ICFilter
uint16_t TIM_ICFilter
Definition: mg32f10x_tim.h:114
TIM_OC4PreloadConfig
void TIM_OC4PreloadConfig(TIM_TypeDef *TIMx, uint16_t TIM_OCPreload)
Enables or disables the TIMx peripheral Preload register on CCR4.
Definition: mg32f10x_tim.c:1404
TIM_OC3NPolarityConfig
void TIM_OC3NPolarityConfig(TIM_TypeDef *TIMx, uint16_t TIM_OCNPolarity)
Configures the TIMx Channel 3N polarity.
Definition: mg32f10x_tim.c:1743
TIM_BDTRInitTypeDef
BDTR structure definition
Definition: mg32f10x_tim.h:123
TIM_SetCompare4
void TIM_SetCompare4(TIM_TypeDef *TIMx, uint32_t Compare4)
Sets the TIMx Capture Compare4 Register value
Definition: mg32f10x_tim.c:2150
TIM_TimeBaseInitTypeDef::TIM_RepetitionCounter
uint8_t TIM_RepetitionCounter
Definition: mg32f10x_tim.h:50
TIM_PWMIConfig
void TIM_PWMIConfig(TIM_TypeDef *TIMx, TIM_ICInitTypeDef *TIM_ICInitStruct)
Configures the TIM peripheral according to the specified parameters in the TIM_ICInitStruct to measur...
Definition: mg32f10x_tim.c:514
TIM_OC4Init
void TIM_OC4Init(TIM_TypeDef *TIMx, TIM_OCInitTypeDef *TIM_OCInitStruct)
Initializes the TIMx Channel4 according to the specified parameters in the TIM_OCInitStruct.
Definition: mg32f10x_tim.c:394