MG32F10x Standard Peripherals Firmware Library

mg32f10x_spi.h
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10 /* Define to prevent recursive inclusion -------------------------------------*/
11 #ifndef __MG32F10x_SPI_H
12 #define __MG32F10x_SPI_H
13
14 #ifdef __cplusplus
15 extern "C" {
16 #endif
17
18 /* Includes ------------------------------------------------------------------*/
19 #include "mg32f10x.h"
20
29 /* Exported types ------------------------------------------------------------*/
30
34 typedef struct
35 {
36 uint16_t SPI_TransferMode;
37 uint16_t SPI_DataSize;
38 uint16_t SPI_CPOL;
39 uint16_t SPI_CPHA;
40 uint16_t SPI_BaudRatePrescaler;
41 uint16_t SPI_FrameFormat;
42 } SPI_InitTypeDef;
43
44
48 typedef struct
49 {
50 uint16_t SPI_MicrowireControlFrameSize;
51 uint16_t SPI_MicrowireTransferMode;
52 uint16_t SPI_MicrowireDirection;
53 uint16_t SPI_MicrowireHandshaking;
54 } SPI_MicrowireInitTypeDef;
55
56
60 typedef struct
61 {
62 uint16_t SPI_EnhancedSpiTransferType;
63 uint16_t SPI_EnhancedSpiInstructionLength;
64 uint16_t SPI_EnhancedSpiAddressLength;
65 uint16_t SPI_EnhancedSpiWaitCycles;
66 } SPI_EnhancedSpiInitTypeDef;
67
68 /* Exported constants --------------------------------------------------------*/
69
77 #define SPI_TransferMode_TxAndRx ((uint16_t)SPI_CR0_TMOD_TX_AND_RX)
78 #define SPI_TransferMode_TxOnly ((uint16_t)SPI_CR0_TMOD_TX_ONLY)
79 #define SPI_TransferMode_RxOnly ((uint16_t)SPI_CR0_TMOD_RX_ONLY)
80 #define SPI_TransferMode_EepromRead ((uint16_t)SPI_CR0_TMOD_EEPROM_READ)
81
89 #define SPI_DataSize_4b ((uint16_t)SPI_CR0_DFS_4BITS)
90 #define SPI_DataSize_5b ((uint16_t)SPI_CR0_DFS_5BITS)
91 #define SPI_DataSize_6b ((uint16_t)SPI_CR0_DFS_6BITS)
92 #define SPI_DataSize_7b ((uint16_t)SPI_CR0_DFS_7BITS)
93 #define SPI_DataSize_8b ((uint16_t)SPI_CR0_DFS_8BITS)
94 #define SPI_DataSize_9b ((uint16_t)SPI_CR0_DFS_9BITS)
95 #define SPI_DataSize_10b ((uint16_t)SPI_CR0_DFS_10BITS)
96 #define SPI_DataSize_11b ((uint16_t)SPI_CR0_DFS_11BITS)
97 #define SPI_DataSize_12b ((uint16_t)SPI_CR0_DFS_12BITS)
98 #define SPI_DataSize_13b ((uint16_t)SPI_CR0_DFS_13BITS)
99 #define SPI_DataSize_14b ((uint16_t)SPI_CR0_DFS_14BITS)
100 #define SPI_DataSize_15b ((uint16_t)SPI_CR0_DFS_15BITS)
101 #define SPI_DataSize_16b ((uint16_t)SPI_CR0_DFS_16BITS)
102
110 #define SPI_CPOL_Low ((uint16_t)0x00)
111 #define SPI_CPOL_High ((uint16_t)0x80)
112
120 #define SPI_CPHA_1Edge ((uint16_t)0x00)
121 #define SPI_CPHA_2Edge ((uint16_t)0x40)
122
130 #define SPI_FrameFormat_SPI ((uint16_t)SPI_CR0_FRF_SPI)
131 #define SPI_FrameFormat_SSP ((uint16_t)SPI_CR0_FRF_SSP)
132 #define SPI_FrameFormat_Microwire ((uint16_t)SPI_CR0_FRF_NS)
133
141 #define SPI_MicrowireControlFrameSize_1b ((uint16_t)SPI_CR0_CFS_01_BIT)
142 #define SPI_MicrowireControlFrameSize_2b ((uint16_t)SPI_CR0_CFS_02_BIT)
143 #define SPI_MicrowireControlFrameSize_3b ((uint16_t)SPI_CR0_CFS_03_BIT)
144 #define SPI_MicrowireControlFrameSize_4b ((uint16_t)SPI_CR0_CFS_04_BIT)
145 #define SPI_MicrowireControlFrameSize_5b ((uint16_t)SPI_CR0_CFS_05_BIT)
146 #define SPI_MicrowireControlFrameSize_6b ((uint16_t)SPI_CR0_CFS_06_BIT)
147 #define SPI_MicrowireControlFrameSize_7b ((uint16_t)SPI_CR0_CFS_07_BIT)
148 #define SPI_MicrowireControlFrameSize_8b ((uint16_t)SPI_CR0_CFS_08_BIT)
149 #define SPI_MicrowireControlFrameSize_9b ((uint16_t)SPI_CR0_CFS_09_BIT)
150 #define SPI_MicrowireControlFrameSize_10b ((uint16_t)SPI_CR0_CFS_10_BIT)
151 #define SPI_MicrowireControlFrameSize_11b ((uint16_t)SPI_CR0_CFS_11_BIT)
152 #define SPI_MicrowireControlFrameSize_12b ((uint16_t)SPI_CR0_CFS_12_BIT)
153 #define SPI_MicrowireControlFrameSize_13b ((uint16_t)SPI_CR0_CFS_13_BIT)
154 #define SPI_MicrowireControlFrameSize_14b ((uint16_t)SPI_CR0_CFS_14_BIT)
155 #define SPI_MicrowireControlFrameSize_15b ((uint16_t)SPI_CR0_CFS_15_BIT)
156 #define SPI_MicrowireControlFrameSize_16b ((uint16_t)SPI_CR0_CFS_16_BIT)
157
165 #define SPI_MicrowireTransferMode_NonSequential ((uint16_t)0x00)
166 #define SPI_MicrowireTransferMode_Sequential ((uint16_t)0x01)
167
175 #define SPI_MicrowireDirection_Receive ((uint16_t)0x00)
176 #define SPI_MicrowireDirection_Transmit ((uint16_t)0x02)
177
185 #define SPI_MicrowireHandshaking_Enable ((uint16_t)0x04)
186 #define SPI_MicrowireHandshaking_Disable ((uint16_t)0x00)
187
195 #define SPI_SpiMode_Standard (SPI_CR0_SPI_MODE_STD)
196 #define SPI_SpiMode_Dual (SPI_CR0_SPI_MODE_DUAL)
197 #define SPI_SpiMode_Quad (SPI_CR0_SPI_MODE_QUAD)
198
206 #define SPI_EnhancedSpiTransferType_0 ((uint16_t)0x00)
207 #define SPI_EnhancedSpiTransferType_1 ((uint16_t)0x01)
208 #define SPI_EnhancedSpiTransferType_2 ((uint16_t)0x02)
209
217 #define SPI_EnhancedSpiInstructionLength_0b ((uint16_t)SPI_ESPICR_INSTL_0BIT)
218 #define SPI_EnhancedSpiInstructionLength_4b ((uint16_t)SPI_ESPICR_INSTL_4BIT)
219 #define SPI_EnhancedSpiInstructionLength_8b ((uint16_t)SPI_ESPICR_INSTL_8BIT)
220 #define SPI_EnhancedSpiInstructionLength_16b ((uint16_t)SPI_ESPICR_INSTL_16BIT)
221
229 #define SPI_EnhancedSpiAddressLength_0b ((uint16_t)SPI_ESPICR_ADDRL_0BIT)
230 #define SPI_EnhancedSpiAddressLength_4b ((uint16_t)SPI_ESPICR_ADDRL_4BIT)
231 #define SPI_EnhancedSpiAddressLength_8b ((uint16_t)SPI_ESPICR_ADDRL_8BIT)
232 #define SPI_EnhancedSpiAddressLength_12b ((uint16_t)SPI_ESPICR_ADDRL_12BIT)
233 #define SPI_EnhancedSpiAddressLength_16b ((uint16_t)SPI_ESPICR_ADDRL_16BIT)
234 #define SPI_EnhancedSpiAddressLength_20b ((uint16_t)SPI_ESPICR_ADDRL_20BIT)
235 #define SPI_EnhancedSpiAddressLength_24b ((uint16_t)SPI_ESPICR_ADDRL_24BIT)
236 #define SPI_EnhancedSpiAddressLength_28b ((uint16_t)SPI_ESPICR_ADDRL_28BIT)
237 #define SPI_EnhancedSpiAddressLength_32b ((uint16_t)SPI_ESPICR_ADDRL_32BIT)
238 #define SPI_EnhancedSpiAddressLength_36b ((uint16_t)SPI_ESPICR_ADDRL_36BIT)
239 #define SPI_EnhancedSpiAddressLength_40b ((uint16_t)SPI_ESPICR_ADDRL_40BIT)
240 #define SPI_EnhancedSpiAddressLength_44b ((uint16_t)SPI_ESPICR_ADDRL_44BIT)
241 #define SPI_EnhancedSpiAddressLength_48b ((uint16_t)SPI_ESPICR_ADDRL_48BIT)
242 #define SPI_EnhancedSpiAddressLength_52b ((uint16_t)SPI_ESPICR_ADDRL_52BIT)
243 #define SPI_EnhancedSpiAddressLength_56b ((uint16_t)SPI_ESPICR_ADDRL_56BIT)
244 #define SPI_EnhancedSpiAddressLength_60b ((uint16_t)SPI_ESPICR_ADDRL_60BIT)
245
253 #define SPI_NSS_0 (0x01)
254 #define SPI_NSS_1 (0x02)
255 #define SPI_NSS_2 (0x04)
256
264 #define SPI_FLAG_BUSY ((uint8_t)SPI_SR_BUSY)
265 #define SPI_FLAG_TFNF ((uint8_t)SPI_SR_TFNF)
266 #define SPI_FLAG_TFE ((uint8_t)SPI_SR_TFE)
267 #define SPI_FLAG_RFNE ((uint8_t)SPI_SR_RFNE)
268 #define SPI_FLAG_RFF ((uint8_t)SPI_SR_RFF)
269 #define SPI_FLAG_TXERR ((uint8_t)SPI_SR_TXERR)
270 #define SPI_FLAG_DCOL ((uint8_t)SPI_SR_DCOL)
271
279 #define SPI_IT_TXE (0x1 << 0)
280 #define SPI_IT_TXO (0x1 << 1)
281 #define SPI_IT_RXU (0x1 << 2)
282 #define SPI_IT_RXO (0x1 << 3)
283 #define SPI_IT_RXF (0x1 << 4)
284 #define SPI_IT_MST (0x1 << 5)
285
293 #define SPI_DMAReq_Rx 0x01
294 #define SPI_DMAReq_Tx 0x02
295
303 /* Exported macro ------------------------------------------------------------*/
304 /* Exported functions --------------------------------------------------------*/
305
306 void SPI_DeInit(SPI_TypeDef* SPIx);
307 void SPI_Init(SPI_TypeDef* SPIx, SPI_InitTypeDef* SPI_InitStruct);
308 void SPI_StructInit(SPI_InitTypeDef* SPI_InitStruct);
309 void SPI_Cmd(SPI_TypeDef* SPIx, FunctionalState NewState);
310 void SPI_TransferModeConfig(SPI_TypeDef* SPIx, uint16_t SPI_TransferMode);
311 void SPI_SlaveOutputCmd(SPI_TypeDef* SPIx, FunctionalState NewState);
312 void SPI_NSSConfig(SPI_TypeDef* SPIx, uint32_t SPI_NSS, FunctionalState NewState);
313 void SPI_NSSToggleModeCmd(SPI_TypeDef* SPIx, FunctionalState NewState);
314 void SPI_ReceiveDataLengthConfig(SPI_TypeDef* SPIx, uint32_t DataLength);
315 void SPI_MicrowireConfig(SPI_TypeDef* SPIx, SPI_MicrowireInitTypeDef* SPI_MicrowireInitStruct);
316 void SPI_MicrowireStructInit(SPI_MicrowireInitTypeDef* SPI_MicrowireInitStruct);
317 void SPI_SpiModeConfig(SPI_TypeDef* SPIx, uint32_t SPI_SpiMode);
318 void SPI_EnhancedSpiConfig(SPI_TypeDef* SPIx, SPI_EnhancedSpiInitTypeDef* SPI_EnhancedSpiInitStruct);
319 void SPI_EnhancedSpiStructInit(SPI_EnhancedSpiInitTypeDef* SPI_EnhancedSpiInitStruct);
320 uint16_t SPI_ReadData(SPI_TypeDef* SPIx);
321 void SPI_WriteData(SPI_TypeDef* SPIx, uint16_t data);
322 FlagStatus SPI_GetFlagStatus(SPI_TypeDef* SPIx, uint8_t SPI_FLAG);
323 void SPI_ITConfig(SPI_TypeDef* SPIx, uint8_t SPI_IT, FunctionalState NewState);
324 ITStatus SPI_GetRawITStatus(SPI_TypeDef* SPIx, uint8_t SPI_IT);
325 ITStatus SPI_GetITStatus(SPI_TypeDef* SPIx, uint8_t SPI_IT);
326 void SPI_ClearITPendingBit(SPI_TypeDef* SPIx, uint8_t SPI_IT);
327 void SPI_RxFIFOThresholdConfig(SPI_TypeDef* SPIx, uint8_t Threshold);
328 void SPI_TxFIFOThresholdConfig(SPI_TypeDef* SPIx, uint8_t Threshold);
329 uint8_t SPI_GetRxFIFOLevel(SPI_TypeDef* SPIx);
330 uint8_t SPI_GetTxFIFOLevel(SPI_TypeDef* SPIx);
331 void SPI_DMARxReqLevelConfig(SPI_TypeDef* SPIx, uint8_t DMARxReqLevel);
332 void SPI_DMATxReqLevelConfig(SPI_TypeDef* SPIx, uint8_t DMATxReqLevel);
333 void SPI_DMACmd(SPI_TypeDef* SPIx, uint32_t SPI_DMAReq, FunctionalState NewState);
334 void SPI_RxdSampleDelayConfig(SPI_TypeDef* SPIx, uint8_t DelayValue);
335
344 #ifdef __cplusplus
345 }
346 #endif
347
348 #endif /* __MG32F10x_SPI_H */
SPI_TypeDef
Definition: mg32f10x.h:571
SPI_ReceiveDataLengthConfig
void SPI_ReceiveDataLengthConfig(SPI_TypeDef *SPIx, uint32_t DataLength)
Configures the number of data frames to be continuously received (only used for SPIMx).
Definition: mg32f10x_spi.c:207
SPI_NSSToggleModeCmd
void SPI_NSSToggleModeCmd(SPI_TypeDef *SPIx, FunctionalState NewState)
Enables or disables the slave select toggle mode.
Definition: mg32f10x_spi.c:189
SPI_MicrowireInitTypeDef
SPI Microwire Init structure definition
Definition: mg32f10x_spi.h:48
SPI_GetRxFIFOLevel
uint8_t SPI_GetRxFIFOLevel(SPI_TypeDef *SPIx)
Returns the number of data can be read from Rx FIFO.
Definition: mg32f10x_spi.c:513
SPI_MicrowireConfig
void SPI_MicrowireConfig(SPI_TypeDef *SPIx, SPI_MicrowireInitTypeDef *SPI_MicrowireInitStruct)
Configures the Microwire frame format according to the specified parameters in the SPI_MicrowireInitS...
Definition: mg32f10x_spi.c:222
SPI_EnhancedSpiConfig
void SPI_EnhancedSpiConfig(SPI_TypeDef *SPIx, SPI_EnhancedSpiInitTypeDef *SPI_EnhancedSpiInitStruct)
Configures the Enhanced SPI Mode according to the specified parameters in the SPI_EnhancedSpiInitStru...
Definition: mg32f10x_spi.c:268
SPI_StructInit
void SPI_StructInit(SPI_InitTypeDef *SPI_InitStruct)
Fills each SPI_InitStruct member with its default value.
Definition: mg32f10x_spi.c:90
SPI_ClearITPendingBit
void SPI_ClearITPendingBit(SPI_TypeDef *SPIx, uint8_t SPI_IT)
Clears the SPIx's interrupt pending bits.
Definition: mg32f10x_spi.c:462
SPI_GetITStatus
ITStatus SPI_GetITStatus(SPI_TypeDef *SPIx, uint8_t SPI_IT)
Checks whether the specified SPIx interrupt has occurred or not.
Definition: mg32f10x_spi.c:430
SPI_DMACmd
void SPI_DMACmd(SPI_TypeDef *SPIx, uint32_t SPI_DMAReq, FunctionalState NewState)
Enables or disables the SPIx's DMA interface.
Definition: mg32f10x_spi.c:571
SPI_GetTxFIFOLevel
uint8_t SPI_GetTxFIFOLevel(SPI_TypeDef *SPIx)
Returns the number of data left in Tx FIFO.
Definition: mg32f10x_spi.c:525
SPI_DMATxReqLevelConfig
void SPI_DMATxReqLevelConfig(SPI_TypeDef *SPIx, uint8_t DMATxReqLevel)
Configures the DMA Tx request level.
Definition: mg32f10x_spi.c:553
SPI_ReadData
uint16_t SPI_ReadData(SPI_TypeDef *SPIx)
Read one data from Rx FIFO.
Definition: mg32f10x_spi.c:297
SPI_NSSConfig
void SPI_NSSConfig(SPI_TypeDef *SPIx, uint32_t SPI_NSS, FunctionalState NewState)
Enables or disables the specified slave select line (only used for SPIMx).
Definition: mg32f10x_spi.c:170
SPI_WriteData
void SPI_WriteData(SPI_TypeDef *SPIx, uint16_t data)
Write one data to Tx FIFO.
Definition: mg32f10x_spi.c:310
SPI_RxdSampleDelayConfig
void SPI_RxdSampleDelayConfig(SPI_TypeDef *SPIx, uint8_t DelayValue)
Configures the rxd sample delay value.
Definition: mg32f10x_spi.c:589
SPI_EnhancedSpiInitTypeDef
SPI Enhanced SPI Mode Init structure definition
Definition: mg32f10x_spi.h:60
SPI_RxFIFOThresholdConfig
void SPI_RxFIFOThresholdConfig(SPI_TypeDef *SPIx, uint8_t Threshold)
Configures the Rx FIFO threshold.
Definition: mg32f10x_spi.c:487
SPI_EnhancedSpiStructInit
void SPI_EnhancedSpiStructInit(SPI_EnhancedSpiInitTypeDef *SPI_EnhancedSpiInitStruct)
Fills each SPI_EnhancedSpiInitStruct member with its default value.
Definition: mg32f10x_spi.c:282
SPI_Init
void SPI_Init(SPI_TypeDef *SPIx, SPI_InitTypeDef *SPI_InitStruct)
Initializes the SPIx peripheral according to the specified parameters in the SPI_InitStruct.
Definition: mg32f10x_spi.c:75
SPI_TxFIFOThresholdConfig
void SPI_TxFIFOThresholdConfig(SPI_TypeDef *SPIx, uint8_t Threshold)
Configures the Tx FIFO threshold.
Definition: mg32f10x_spi.c:501
SPI_GetRawITStatus
ITStatus SPI_GetRawITStatus(SPI_TypeDef *SPIx, uint8_t SPI_IT)
Checks whether the specified SPIx raw interrupt status.
Definition: mg32f10x_spi.c:396
SPI_DeInit
void SPI_DeInit(SPI_TypeDef *SPIx)
Deinitializes the SPIx peripheral registers to their default reset values.
Definition: mg32f10x_spi.c:40
SPI_InitTypeDef
SPI Init structure definition
Definition: mg32f10x_spi.h:34
SPI_MicrowireStructInit
void SPI_MicrowireStructInit(SPI_MicrowireInitTypeDef *SPI_MicrowireInitStruct)
Fills each SPI_MicrowireInitStruct member with its default value.
Definition: mg32f10x_spi.c:235
SPI_SlaveOutputCmd
void SPI_SlaveOutputCmd(SPI_TypeDef *SPIx, FunctionalState NewState)
Enables or disables the slave output (only used for SPISx).
Definition: mg32f10x_spi.c:146
SPI_ITConfig
void SPI_ITConfig(SPI_TypeDef *SPIx, uint8_t SPI_IT, FunctionalState NewState)
Enables or disables the specified SPI interrupts.
Definition: mg32f10x_spi.c:367
SPI_SpiModeConfig
void SPI_SpiModeConfig(SPI_TypeDef *SPIx, uint32_t SPI_SpiMode)
Configures the Spi Mode.
Definition: mg32f10x_spi.c:254
SPI_TransferModeConfig
void SPI_TransferModeConfig(SPI_TypeDef *SPIx, uint16_t SPI_TransferMode)
Configures the transfer mode.
Definition: mg32f10x_spi.c:132
SPI_GetFlagStatus
FlagStatus SPI_GetFlagStatus(SPI_TypeDef *SPIx, uint8_t SPI_FLAG)
Checks whether the specified SPIx flag is set or not.
Definition: mg32f10x_spi.c:331
SPI_Cmd
void SPI_Cmd(SPI_TypeDef *SPIx, FunctionalState NewState)
Enables or disables the specified SPI peripheral.
Definition: mg32f10x_spi.c:109
SPI_DMARxReqLevelConfig
void SPI_DMARxReqLevelConfig(SPI_TypeDef *SPIx, uint8_t DMARxReqLevel)
Configures the DMA Rx request level.
Definition: mg32f10x_spi.c:539